1. Field of the Invention
The present invention relates to a parallel multi-layer printed circuit board and a method for manufacturing the same. More particularly, the present invention relates to a multi-layer printed circuit board, in which circuit layers and insulating layers are alternately laid up by a parallel or batch stacking method, and are then pressed so that via holes of the circuit layers provided with plated inner walls without application of additional plating and conductive paste-filling steps are electrically connected to via holes of the insulating layers filled with a conductive paste, and a method for manufacturing the multi-layer printed circuit board.
2. Description of the Related Art
As well known to those skilled in the art, electronic products have been developed toward miniaturization, thin profile, high-density integration, assembly into a package and high portability. In order to meet the above trends, a multi-layer printed circuit board has been developed to have a fine pattern and be miniaturized and packaged. Accordingly, in order to increase the possibility of fine pattern formation, reliability and design density of the multi-layer printed circuit board, a raw material of the multi-layer printed circuit board has been changed, layer constitution of the multi-layer printed circuit board has become complicated, and components to be mounted on the multi-layer printed circuit board have been changed from DIP (Dual In-line Package) types to SMT (Surface Mount Technology) types so that an overall mount density of the components is increased. Further, since the electronic products have been developed toward high-functionality, Internet application, moving picture application and transmission/reception of high-capacity data, the printed circuit board has required an increasingly complicated design and a high level of technology.
Printed circuit boards (PCB) are divided into a single-sided PCB provided with wiring only on one surface of an insulating substrate, a double-sided PCB provided with wiring on both surfaces of an insulating substrate, and a multi-layered board (MLB) comprising multiple layers provided with wiring. Conventional electronic products had simple-structured components and a simple circuit pattern, thus mainly using the single-sided PCB. On the other hand, recent electronic products require a complicated-structured, high-density and fine circuit pattern, thus mainly using the double-sided PCB or the MLB. The present invention relates to a method for manufacturing the MLB.
The MLB comprises a plurality of layers, on which wiring is formed, in order to enlarge wiring areas. More specifically, the MLB comprises internal layers made of a thin core (T/C), and external layers. Basically, the MLB is a four-layer MLB (two internal layers and two external layers) obtained by attaching the internal and external layers to each other by Prepregs. That is, the MLB comprises at least four layers. The MLB may be a six-layer, eight-layer or ten-layer printed circuit board, or more plural-layer printed circuit board according to increase in the complexity of circuits on the MLB.
A power circuit, a ground circuit, a signal circuit, etc. are formed in the internal layer. The Prepreg is interposed between the internal layer and external layer, thus serving to attach the internal and external layers to each other and to insulate the internal and external layers from each other. Here, the wiring of each of the internal and external layers is connected to the wiring of the other layers by via holes (through holes).
The MLB is advantageous in that wiring density is remarkably increased, but disadvantageous in that its manufacturing process is complicated. Particularly, in a build-up method for manufacturing the MLB, in which additional layers are stacked on an internal layer provided with internal circuits formed thereon, it is impossible to deform the internal layer after the stacking of the layers. Accordingly, in this case, when the internal layer is defective, the MLB manufactured by stacking the additional layers on the internal layer fails. In order to detect such a failure, many test apparatuses are required.
FIGS. 1a to 1d are cross-sectional views illustrating a process for forming a circuit layer comprising a circuit pattern in a method for manufacturing a conventional multi-layer printed circuit board by a parallel or a batch stacking method. Via holes are formed through the circuit layer, and are then filled by plating so that the via holes of the circuit layer are electrically connected to via holes of an insulating layer or another circuit layer.
As shown in FIG. 1a, a copper stack plate 101 serving as a base substrate of a printed circuit board is prepared. Generally, the copper stack plate 101 includes a stiffening base material 103, and copper films 102 respectively coated on both surfaces of the stiffening base material 103.
As shown in FIG. 1b, via holes 104 are formed through the copper stack plate 101. The via holes 104 are formed so as to have a diameter of 50 μm to 100 μM using a laser such as an YAG (Yttrium-Aluminum-Garnet) laser or a CO2 laser, or using a mechanical drilling method. The multi-layer printed circuit board conventionally comprises via holes having a diameter of 200 μm to 300 μm. However, by reducing the diameter of the via holes 104 as described above, the reduced via holes 104 can be filled by plating without application of plugging using any additional paste.
In FIG. 1c, upper and lower surfaces of the copper stack plate 101 and inner walls of the via holes 104 are plated by electro-plating and electroless-plating. Thereby, as shown in FIG. 1c, plating layers 105 are respectively formed on the upper and lower surfaces of the copper stack plate 101, the via holes 104 are filled by plating.
As described above, it is possible to achieve interconnection between layers by filling the via holes 104 by plating without application of any additional filling step. Further, the via holes 104 may be filled with a conductive paste after the inner walls of the via holes 104 are plated.
As shown in FIG. 1d, circuit patterns are formed on the copper stack plate 101 by a circuit pattern forming method such as an etching method. A circuit layer 106 obtained by the above-described process serves as circuit layers 106a, 106b and 106c of a multi-layer printed circuit board manufactured by a parallel or a batch stacking method, as shown in FIG. 3.
The above circuit layer 106 serves one of the circuit layers 106a, 106b and 106c of FIG. 3, and the via holes 104 and the circuit patterns of the circuit layer 106 are designed in consideration of the interconnection with an insulating layer.
The required number of the circuit and insulating layers is determined by the desired number of layers of the multi-layer printed circuit board to be manufactured. For example, a four-layer printed circuit board requires two circuit layers, a six-layer printed circuit board requires three circuit layers, and an eight-layer printed circuit board requires four circuit layers.
FIGS. 2a to 2d are cross-sectional views illustrating a process for forming an insulating layer interposed between circuit layers in a method for manufacturing a parallel multi-layer printed circuit board in accordance with the present invention.
As shown in FIG. 2a, a flat-type insulating material 201 is prepared. The flat-type insulating material 201 includes a Prepreg 203 and release films 202, made of polyester, respectively attached to both surfaces of the Prepreg 203.
The Prepreg 203 has a thickness, which is variously selected by specification of a product to be manufactured. The release film 202 has a thickness of 20 μm to 30 μm, and is provided in advance on the surfaces of the Prepreg 20 in a production process, or attached to the surfaces of the produced Prepreg 20.
As shown in FIG. 2b, via holes 204 are formed through the flat-type insulating material 201 by drilling. Here, the via holes 204 are obtained by mechanically drilling the flat-type insulating material 201. The via holes 204 have a diameter slightly larger than that of the via holes 104 formed through the circuit layer 106 in consideration of the interconnection between the insulating layer and the circuit layer.
The via holes 204 of the insulating layer, which is connected to the circuit layer manufactured by filling the via holes 104 by plating with reference to FIGS. 1a to 1d, have a diameter of approximately 100 μm.
As shown in FIG. 2c, the via holes 204 are filled with a conductive paste 205, and then as shown in FIG. 2d, the release films 202 are detached from both surfaces of the Prepreg 203.
An insulating layer 206 obtained by the above-described process serves as one of insulating layers 206a and 206b of FIG. 3.
Positions and sizes of the via holes 204 of the insulating layer 206 are designed in consideration of those of the via holes 104 of the circuit layer 106 connected to the insulating layer 206. Further, the number of the insulating layers 206 is determined by the desired number of layers of the multi-layer printed circuit board to be manufactured. For example, a four-layer printed circuit board requires one insulating layer, a six-layer printed circuit board requires two circuit layers, and an eight-layer printed circuit board requires three circuit layers. On the other hand, in case of using a build-up manufacturing method, a four-layer printed circuit board requires two insulating layers, and a six-layer printed circuit board requires four circuit layers.
As shown in FIG. 3, the circuit layers 106a, 106b and 106c manufactured by the process shown in FIGS. 1a to 1d and the insulating layers 206a and 206b manufactured by the process shown in FIGS. 2a to 2d are alternately stacked.
The via holes of the stacked layers 106a, 106b, 106c, 206a and 206b precisely coincide with each other by a targeting method or a pin-matching method.
In the targeting method, a target hole is formed at a position of “a target guide mark”, serving as a reference point of drilling, by means of a target drill using X-rays, after the stacking of the circuit layers 106a, 106b and 106c and the insulating layers 206a and 206b. 
In the pin-matching method, a hole serving as a reference point of interlayer matching, i.e., a guide hole, is formed at the predetermined same positions of the circuit layers 106a, 106b and 106c and the insulating layers 206a and 206b, and then when the circuit layers 106a, 106b and 106c and the insulating layers 206a and 206b are laid up, a pin is inserted into the guide holes formed through the circuit layers 106a, 106b and 106c and the insulating layers 206a and 206b so that the via holes 104 of the circuit layers 106a, 106b and 106c and the via holes 204 of the insulating layers 206a and 206b are matched.
Thereafter, as shown in FIG. 3, the laid-up circuit layers 106a, 106b and 106c and insulating layers 206a and 206b are pressed in a direction of arrows by a press, thereby being produced into a six-layer printed circuit board shown in FIG. 4.
Thereafter, post-treatment such as a trimming step for trimming resin and copper film located at the edge of the printed circuit board is performed, thereby preventing a product mounted on the printed circuit board from being damaged and users from being damaged from the sharp edge of the printed circuit board.
A multi-layer printed circuit board manufactured by a build-up method has a structure such that an insulating layer is stacked on one double-sided printed circuit board and then a single-sided printed circuit board is stacked thereon. However, a multi-layer printed circuit board manufactured by a parallel or a batch stacking method has a structure such that a plurality of double-sided printed circuit boards and a plurality of insulating layers are alternately stacked.
Based on the above-described difference between the above-described methods, it is possible to judge a manufacturing method of a printed circuit board by checking a cross-section of the printed circuit board.
PCT publication No. WO2001/39267 discloses a method for manufacturing a multi-layer printed circuit board by alternately stacking a plurality of single-sided printed circuit boards and adhesive layers on a base layer obtained by forming a circuit on one surface or both sides of an insulating material, and by pressing the stacked layers.
A cross-section of the multi-layer printed circuit board manufactured by the method disclosed by the above patent is the same as a cross-section of a multi-layer printed circuit board manufactured by a build-up method. Here, the insulating material in a c-stage rather than a Prepreg in a b-stage is used.
Accordingly, there has been proposed a method for manufacturing a multi-layer printed circuit board by a batch stacking method, which is simpler than the method disclosed by the above patent.